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[/] [or1k/] [tags/] [rel_25/] [or1200/] [rtl] - Rev 504

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Rev Log message Author Age Path
504 New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs. lampret 8228d 14h /or1k/tags/rel_25/or1200/rtl
402 Added OR1200_GENERIC_MULTP2_32X32 and OR1200_ASIC_MULTP2_32X32 lampret 8258d 17h /or1k/tags/rel_25/or1200/rtl
401 *** empty log message *** simons 8262d 03h /or1k/tags/rel_25/or1200/rtl
400 force_dslot_fetch does not work - allways zero. simons 8262d 03h /or1k/tags/rel_25/or1200/rtl
399 Trap insn couses break after exits ex_insn. simons 8262d 03h /or1k/tags/rel_25/or1200/rtl
391 Fixed except_stop width and fixed EX PC for 1400444f no-ops. lampret 8264d 23h /or1k/tags/rel_25/or1200/rtl
390 Changed instantiation name of VS RAMs. lampret 8265d 01h /or1k/tags/rel_25/or1200/rtl
387 Now FPGA and ASIC target are separate. lampret 8265d 02h /or1k/tags/rel_25/or1200/rtl
386 Fixed VS RAM instantiation - again. lampret 8265d 02h /or1k/tags/rel_25/or1200/rtl
370 Program counter divided to PPC and NPC. simons 8269d 00h /or1k/tags/rel_25/or1200/rtl
367 Changed DSR/DRR behavior and exception detection. lampret 8269d 14h /or1k/tags/rel_25/or1200/rtl
365 Added wb_cyc_o assignment after it was removed by accident. lampret 8270d 08h /or1k/tags/rel_25/or1200/rtl
360 Added OR1200_REGISTERED_INPUTS. lampret 8272d 01h /or1k/tags/rel_25/or1200/rtl
359 Added optional sampling of inputs. lampret 8272d 01h /or1k/tags/rel_25/or1200/rtl
358 Fixed virtual silicon single-port rams instantiation. lampret 8272d 01h /or1k/tags/rel_25/or1200/rtl
357 Fixed dbg_is_o assignment width. lampret 8272d 01h /or1k/tags/rel_25/or1200/rtl
356 Break point bug fixed simons 8272d 03h /or1k/tags/rel_25/or1200/rtl
354 Fixed width of du_except. lampret 8272d 21h /or1k/tags/rel_25/or1200/rtl
353 Cashes disabled. simons 8273d 08h /or1k/tags/rel_25/or1200/rtl
352 OR1200_REGISTERED_OUTPUTS can now be enabled. lampret 8274d 11h /or1k/tags/rel_25/or1200/rtl

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