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[/] [or1k/] [tags/] [rel_5] - Rev 790

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Rev Log message Author Age Path
790 Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives lampret 8140d 18h /or1k/tags/rel_5
789 Added response from memory controller (addr 0x60000000) lampret 8140d 19h /or1k/tags/rel_5
788 Some of the warnings fixed. lampret 8140d 20h /or1k/tags/rel_5
787 Added romfs.tgz lampret 8141d 14h /or1k/tags/rel_5
786 Moved UCF constraint file to the backend directory. lampret 8141d 14h /or1k/tags/rel_5
785 Added XSV specific documentation. lampret 8141d 14h /or1k/tags/rel_5
784 Added soem missing files. lampret 8141d 14h /or1k/tags/rel_5
783 Added sim directory and sub files/dirs. lampret 8141d 14h /or1k/tags/rel_5
782 Added the old SW directory. It needs to be updated for the new ORP environment and test cases moved to sw directory. lampret 8141d 14h /or1k/tags/rel_5
781 Added design compiler scripts. However these are not ready for use yet .... They need to be updated for the ORP sources and ORP sources need to be updated as well. lampret 8141d 15h /or1k/tags/rel_5
780 Added libraries. lampret 8141d 15h /or1k/tags/rel_5
779 Added bench directory lampret 8141d 15h /or1k/tags/rel_5
778 Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs. lampret 8141d 15h /or1k/tags/rel_5
777 Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2 lampret 8141d 16h /or1k/tags/rel_5
776 Updated defines. lampret 8141d 16h /or1k/tags/rel_5
775 Optimized cache controller FSM. lampret 8141d 16h /or1k/tags/rel_5
774 Removed old files. lampret 8141d 16h /or1k/tags/rel_5
773 Changing directory structure ... lampret 8141d 17h /or1k/tags/rel_5
772 Changing directory structure ... lampret 8141d 17h /or1k/tags/rel_5
771 Added Makefile that is used to convert linux binary to loadable file for XSV board lampret 8142d 17h /or1k/tags/rel_5

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