URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_7] - Rev 1011

Rev	Log message	Author	Age	Path
1011	Removed some commented RTL. Fixed SR/ESR flag bug.	lampret	8010d 18h	/or1k/tags/rel_7
1010	Import	ivang	8014d 22h	/or1k/tags/rel_7
1009	Import	ivang	8014d 22h	/or1k/tags/rel_7
1008	Import	ivang	8014d 22h	/or1k/tags/rel_7
1007	Import	ivang	8014d 22h	/or1k/tags/rel_7
1006	Import	ivang	8014d 23h	/or1k/tags/rel_7
1005	Import	ivang	8014d 23h	/or1k/tags/rel_7
1004	Now every ramdisk image should have init program.	simons	8015d 07h	/or1k/tags/rel_7
1003	cuc temporary files are deleted upon exiting	markom	8015d 07h	/or1k/tags/rel_7
1002	Now every ramdisk image should have init program.	simons	8015d 07h	/or1k/tags/rel_7
1001	fixed load/store state machine verilog generation errors	markom	8015d 07h	/or1k/tags/rel_7
1000	IC/DC cache enable routines fixed.	simons	8015d 08h	/or1k/tags/rel_7
999	Now every ramdisk image should have init program.	simons	8015d 09h	/or1k/tags/rel_7
998	added missing fout initialization	markom	8015d 11h	/or1k/tags/rel_7
997	PRINTF should be used instead of printf; command redirection repaired	markom	8015d 12h	/or1k/tags/rel_7
996	some minor bugs fixed	markom	8016d 10h	/or1k/tags/rel_7
994	Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board.	lampret	8016d 18h	/or1k/tags/rel_7
993	Fixed IMMU bug.	lampret	8016d 18h	/or1k/tags/rel_7
992	A bug when cache enabled and bus error comes fixed.	simons	8017d 03h	/or1k/tags/rel_7
991	Different memory controller.	simons	8017d 03h	/or1k/tags/rel_7