OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_9/] [or1200] - Rev 944

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
944 Added OR1200_WB_RETRY. Moved WB registered outsputs / samples inputs into lower section. lampret 8034d 21h /or1k/tags/rel_9/or1200
943 Added optional retry counter for wb_rty_i. Added graceful termination for aborted transfers. lampret 8034d 21h /or1k/tags/rel_9/or1200
942 Delayed external access at page crossing. lampret 8034d 21h /or1k/tags/rel_9/or1200
916 MAC now follows software convention (signed multiply instead of unsigned). lampret 8047d 00h /or1k/tags/rel_9/or1200
895 Added simple trace buffer [only for Xilinx Virtex target]. Fixed instruction fetch abort when new exception is recognized. lampret 8063d 04h /or1k/tags/rel_9/or1200
871 Generic flip-flop based memory macro for register file. lampret 8099d 10h /or1k/tags/rel_9/or1200
870 Added defines for enabling generic FF based memory macro for register file. lampret 8099d 10h /or1k/tags/rel_9/or1200
869 Added generic flip-flop based memory macro instantiation. lampret 8099d 10h /or1k/tags/rel_9/or1200
795 Added a directive to ignore signed division variables that are only used in simulation. lampret 8170d 09h /or1k/tags/rel_9/or1200
794 Added again just recently removed full_case directive lampret 8170d 09h /or1k/tags/rel_9/or1200
791 Fixed some ports in instnatiations that were removed from the modules lampret 8170d 10h /or1k/tags/rel_9/or1200
790 Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives lampret 8170d 10h /or1k/tags/rel_9/or1200
788 Some of the warnings fixed. lampret 8170d 11h /or1k/tags/rel_9/or1200
778 Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs. lampret 8171d 07h /or1k/tags/rel_9/or1200
777 Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2 lampret 8171d 07h /or1k/tags/rel_9/or1200
776 Updated defines. lampret 8171d 07h /or1k/tags/rel_9/or1200
775 Optimized cache controller FSM. lampret 8171d 07h /or1k/tags/rel_9/or1200
774 Removed old files. lampret 8171d 07h /or1k/tags/rel_9/or1200
737 Added alternative for critical path in DU. lampret 8186d 02h /or1k/tags/rel_9/or1200
736 Changed generation of SPR address. Now it is ORed from base and offset instead of a sum. lampret 8189d 01h /or1k/tags/rel_9/or1200

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.