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[/] [or1k/] [tags/] [stable_0_1_0] - Rev 655

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Rev Log message Author Age Path
655 TLB registers addresses changed. simons 8255d 17h /or1k/tags/stable_0_1_0
654 This is repaired in new versions of uClinux. simons 8255d 18h /or1k/tags/stable_0_1_0
653 Some cleanup. simons 8255d 18h /or1k/tags/stable_0_1_0
652 Some cleanup. simons 8255d 19h /or1k/tags/stable_0_1_0
651 Some cleanup. simons 8255d 19h /or1k/tags/stable_0_1_0
650 Some cleanup. simons 8255d 20h /or1k/tags/stable_0_1_0
649 Some cleanup. simons 8255d 20h /or1k/tags/stable_0_1_0
648 fb now works in system memory markom 8257d 05h /or1k/tags/stable_0_1_0
647 some changes to fb to make it compatible with HW markom 8257d 23h /or1k/tags/stable_0_1_0
646 some bugs fixed markom 8258d 01h /or1k/tags/stable_0_1_0
645 simple frame buffer peripheral with test added markom 8258d 05h /or1k/tags/stable_0_1_0
644 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8259d 00h /or1k/tags/stable_0_1_0
643 Quick bug fix. ivang 8259d 00h /or1k/tags/stable_0_1_0
642 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8259d 00h /or1k/tags/stable_0_1_0
641 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8259d 00h /or1k/tags/stable_0_1_0
640 Merge profiler and mprofiler with sim. ivang 8259d 02h /or1k/tags/stable_0_1_0
639 MMU cache inhibit bit test added. simons 8261d 16h /or1k/tags/stable_0_1_0
638 TLBTR CI bit is now working properly. simons 8261d 17h /or1k/tags/stable_0_1_0
637 Updated file names. lampret 8261d 18h /or1k/tags/stable_0_1_0
636 Fixed combinational loops. lampret 8261d 18h /or1k/tags/stable_0_1_0

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