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[/] [or1k/] [tags/] [stable_0_2_0/] [or1ksim] - Rev 92

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92 Tick timer. lampret 8503d 20h /or1k/tags/stable_0_2_0/or1ksim
91 Tick timer facility. lampret 8503d 20h /or1k/tags/stable_0_2_0/or1ksim
90 Added tick timer. lampret 8503d 21h /or1k/tags/stable_0_2_0/or1ksim
86 Added dh command. lampret 8505d 05h /or1k/tags/stable_0_2_0/or1ksim
85 Added dumphex. lampret 8505d 05h /or1k/tags/stable_0_2_0/or1ksim
84 Update. lampret 8505d 05h /or1k/tags/stable_0_2_0/or1ksim
83 Updates. lampret 8505d 05h /or1k/tags/stable_0_2_0/or1ksim
82 Changed pctemp to pcnext. lampret 8505d 05h /or1k/tags/stable_0_2_0/or1ksim
79 Data and instruction cache simulation added. lampret 8534d 21h /or1k/tags/stable_0_2_0/or1ksim
78 (i/d)tlb_status lampret 8658d 11h /or1k/tags/stable_0_2_0/or1ksim
77 Regular update. lampret 8658d 11h /or1k/tags/stable_0_2_0/or1ksim
76 regular update lampret 8658d 11h /or1k/tags/stable_0_2_0/or1ksim
75 simgetstr added. eval_mem32 replaced with evalsim_mem32. lampret 8658d 11h /or1k/tags/stable_0_2_0/or1ksim
74 Same as DMMU. lampret 8665d 10h /or1k/tags/stable_0_2_0/or1ksim
73 Fixed all bugs. Now more or less works. IMMU still has some problems (exception start). lampret 8665d 10h /or1k/tags/stable_0_2_0/or1ksim
72 Added 'how to build GNU tools' lampret 8670d 11h /or1k/tags/stable_0_2_0/or1ksim
69 Sim debug. lampret 8677d 10h /or1k/tags/stable_0_2_0/or1ksim
68 Added hook for l.sys 204. Changed SPR of flag (no more CCR) lampret 8677d 10h /or1k/tags/stable_0_2_0/or1ksim
67 Added simulator "application load". lampret 8677d 10h /or1k/tags/stable_0_2_0/or1ksim
66 Added another set of eval_ functions that should be used directly by simulator.
evalsim_ and setsim_ don't go through MMU transaltion mechanism.		 lampret 8677d 10h /or1k/tags/stable_0_2_0/or1ksim

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