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[/] [or1k/] [tags/] [stable_0_2_0/] [or1ksim] - Rev 929

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Rev Log message Author Age Path
929 add - sfxx optimization markom 8018d 04h /or1k/tags/stable_0_2_0/or1ksim
928 sfor instruction replaced by conditional cmov markom 8018d 05h /or1k/tags/stable_0_2_0/or1ksim
927 problems with LRBB removal solved markom 8018d 05h /or1k/tags/stable_0_2_0/or1ksim
926 regs and loads do not use rst - can yield less logic markom 8018d 23h /or1k/tags/stable_0_2_0/or1ksim
925 new BB joining type; BBID_END added; virtex.tim sample cuc timings markom 8018d 23h /or1k/tags/stable_0_2_0/or1ksim
924 bb joining, basic block triggers bugs fixed; more verilog generation of arbiter markom 8019d 06h /or1k/tags/stable_0_2_0/or1ksim
919 stable release rherveille 8019d 22h /or1k/tags/stable_0_2_0/or1ksim
918 sa command bug fixed markom 8020d 05h /or1k/tags/stable_0_2_0/or1ksim
917 optimize cmovs bug fixed markom 8020d 05h /or1k/tags/stable_0_2_0/or1ksim
915 cuc main verilog file generation markom 8021d 02h /or1k/tags/stable_0_2_0/or1ksim
914 SR[FO] is always set to 1. lampret 8021d 07h /or1k/tags/stable_0_2_0/or1ksim
913 Executed log insns counter output in decimal instead of hex. lampret 8021d 07h /or1k/tags/stable_0_2_0/or1ksim
912 Reset SR (and ESR) have TEE set to zero (no tick timer). lampret 8021d 07h /or1k/tags/stable_0_2_0/or1ksim
911 Added instruction count to hardware executed log lampret 8021d 07h /or1k/tags/stable_0_2_0/or1ksim
910 No arith and overflow flags by default. lampret 8021d 08h /or1k/tags/stable_0_2_0/or1ksim
909 Bug fix. lampret 8022d 18h /or1k/tags/stable_0_2_0/or1ksim
908 busy signal added markom 8027d 02h /or1k/tags/stable_0_2_0/or1ksim
907 function calling generation; not tested yet markom 8027d 02h /or1k/tags/stable_0_2_0/or1ksim
906 function dependency analysis added markom 8027d 06h /or1k/tags/stable_0_2_0/or1ksim
905 type 2 bb joining; few small bugs fixed; cmov edge condition added markom 8028d 01h /or1k/tags/stable_0_2_0/or1ksim

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