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[/] [or1k/] [tags/] [stable_0_2_0] - Rev 1007

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Rev Log message Author Age Path
1007 Import ivang 8023d 19h /or1k/tags/stable_0_2_0
1006 Import ivang 8023d 19h /or1k/tags/stable_0_2_0
1005 Import ivang 8023d 19h /or1k/tags/stable_0_2_0
1004 Now every ramdisk image should have init program. simons 8024d 04h /or1k/tags/stable_0_2_0
1003 cuc temporary files are deleted upon exiting markom 8024d 04h /or1k/tags/stable_0_2_0
1002 Now every ramdisk image should have init program. simons 8024d 04h /or1k/tags/stable_0_2_0
1001 fixed load/store state machine verilog generation errors markom 8024d 04h /or1k/tags/stable_0_2_0
1000 IC/DC cache enable routines fixed. simons 8024d 04h /or1k/tags/stable_0_2_0
999 Now every ramdisk image should have init program. simons 8024d 05h /or1k/tags/stable_0_2_0
998 added missing fout initialization markom 8024d 07h /or1k/tags/stable_0_2_0
997 PRINTF should be used instead of printf; command redirection repaired markom 8024d 08h /or1k/tags/stable_0_2_0
996 some minor bugs fixed markom 8025d 07h /or1k/tags/stable_0_2_0
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 8025d 14h /or1k/tags/stable_0_2_0
993 Fixed IMMU bug. lampret 8025d 14h /or1k/tags/stable_0_2_0
992 A bug when cache enabled and bus error comes fixed. simons 8025d 23h /or1k/tags/stable_0_2_0
991 Different memory controller. simons 8025d 23h /or1k/tags/stable_0_2_0
990 Test is now complete. simons 8026d 00h /or1k/tags/stable_0_2_0
989 c++ is making problems so, for now, it is excluded. simons 8027d 07h /or1k/tags/stable_0_2_0
988 ORP architecture supported. simons 8027d 23h /or1k/tags/stable_0_2_0
987 ORP architecture supported. simons 8028d 06h /or1k/tags/stable_0_2_0

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