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[/] [or1k/] [tags/] [stable_0_2_0] - Rev 358

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Rev Log message Author Age Path
358 Fixed virtual silicon single-port rams instantiation. lampret 8272d 05h /or1k/tags/stable_0_2_0
357 Fixed dbg_is_o assignment width. lampret 8272d 05h /or1k/tags/stable_0_2_0
356 Break point bug fixed simons 8272d 07h /or1k/tags/stable_0_2_0
355 uart VAPI model improved; changes to MC and eth. markom 8272d 15h /or1k/tags/stable_0_2_0
354 Fixed width of du_except. lampret 8273d 01h /or1k/tags/stable_0_2_0
353 Cashes disabled. simons 8273d 12h /or1k/tags/stable_0_2_0
352 OR1200_REGISTERED_OUTPUTS can now be enabled. lampret 8274d 15h /or1k/tags/stable_0_2_0
351 Fixed some l.trap typos. lampret 8274d 16h /or1k/tags/stable_0_2_0
350 For GDB changed single stepping and disabled trap exception. lampret 8274d 18h /or1k/tags/stable_0_2_0
349 Some bugs regarding cache simulation fixed. simons 8276d 06h /or1k/tags/stable_0_2_0
348 Added instructions on how to build configure. ivang 8277d 14h /or1k/tags/stable_0_2_0
347 Added CRC32 calculation to Ethernet erez 8278d 11h /or1k/tags/stable_0_2_0
346 Improved Ethernet simulation erez 8278d 13h /or1k/tags/stable_0_2_0
345 Added check for net/ethernet.h (needed by ethernet simulator) erez 8278d 13h /or1k/tags/stable_0_2_0
344 added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model markom 8278d 15h /or1k/tags/stable_0_2_0
343 Small touches to test programs erez 8278d 17h /or1k/tags/stable_0_2_0
342 added exception vectors to support and modified section names markom 8279d 14h /or1k/tags/stable_0_2_0
341 added VAPI for uart; uart 16550 support, some bugs fixed markom 8279d 16h /or1k/tags/stable_0_2_0
340 Added hpint vector lampret 8279d 16h /or1k/tags/stable_0_2_0
339 Added setpc test lampret 8279d 16h /or1k/tags/stable_0_2_0

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