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[/] [or1k/] [tags/] [stable_0_2_0] - Rev 810

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810 This commit was generated by cvs2svn to compensate for changes in r809,
which included commits to RCS files with non-trunk default branches.		 simons 8132d 07h /or1k/tags/stable_0_2_0
808 Elf support added. simons 8132d 07h /or1k/tags/stable_0_2_0
807 sched files moved to support dir markom 8133d 10h /or1k/tags/stable_0_2_0
806 uart now partially uses scheduler markom 8133d 10h /or1k/tags/stable_0_2_0
805 kbd, fb, vga devices now uses scheduler markom 8133d 10h /or1k/tags/stable_0_2_0
804 memory regions can now overlap with MC -- not according to MC spec markom 8134d 04h /or1k/tags/stable_0_2_0
803 Free irq handler fixed. simons 8136d 21h /or1k/tags/stable_0_2_0
802 Cache and tick timer tests fixed. simons 8138d 08h /or1k/tags/stable_0_2_0
801 l.muli instruction added markom 8140d 04h /or1k/tags/stable_0_2_0
800 Bug fixed. simons 8141d 02h /or1k/tags/stable_0_2_0
799 Wrapping around 512k boundary to simulate real hw. simons 8144d 19h /or1k/tags/stable_0_2_0
798 Hardware scroll added. This possible due to the fact that crt is wrapping around 512k boundary. simons 8144d 19h /or1k/tags/stable_0_2_0
797 Changed hardcoded address for fake MC to use a define. lampret 8144d 21h /or1k/tags/stable_0_2_0
796 Removed unused ports wb_clki and wb_rst_i lampret 8144d 21h /or1k/tags/stable_0_2_0
795 Added a directive to ignore signed division variables that are only used in simulation. lampret 8145d 01h /or1k/tags/stable_0_2_0
794 Added again just recently removed full_case directive lampret 8145d 01h /or1k/tags/stable_0_2_0
793 Added synthesis off/on for timescale.v included file. lampret 8145d 01h /or1k/tags/stable_0_2_0
792 Fixed port names that changed. lampret 8145d 01h /or1k/tags/stable_0_2_0
791 Fixed some ports in instnatiations that were removed from the modules lampret 8145d 01h /or1k/tags/stable_0_2_0
790 Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives lampret 8145d 01h /or1k/tags/stable_0_2_0

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