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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [mmu/] [dmmu.h] - Rev 1572

Rev	Log message	Author	Age	Path
1572	This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc1'.		6881d 18h	/or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/dmmu.h
1539	Speed up the dmmu	nogj	6952d 04h	/or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/dmmu.h
1350	Mark a simulated cpu address as such, by introducing the new oraddr_t type	nogj	7097d 17h	/or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/dmmu.h
1308	Gyorgy Jeney: extensive cleanup	phoenix	7302d 11h	/or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/dmmu.h
430	dpfault and ipfault exceptions implemented	markom	8253d 19h	/or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/dmmu.h
425	immu and dmmu configurations added	markom	8253d 21h	/or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/dmmu.h
204	Added function prototypes to stop gcc from complaining	erez	8335d 21h	/or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/dmmu.h
62	OR1K DMMU model.	lampret	8680d 03h	/or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/dmmu.h
6	Just a regular update with exception of cache simulation. MMU simulation still under development.	lampret	8902d 13h	/or1k/tags/stable_0_2_0_rc1/or1ksim/mmu/dmmu.h