URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1] - Rev 91

Rev	Log message	Author	Age	Path
91	Tick timer facility.	lampret	8531d 03h	/or1k/tags/stable_0_2_0_rc1
90	Added tick timer.	lampret	8531d 05h	/or1k/tags/stable_0_2_0_rc1
89	Minor changes.	lampret	8532d 01h	/or1k/tags/stable_0_2_0_rc1
88	Update.	lampret	8532d 12h	/or1k/tags/stable_0_2_0_rc1
87	Files required for creation of html files.	lampret	8532d 12h	/or1k/tags/stable_0_2_0_rc1
86	Added dh command.	lampret	8532d 12h	/or1k/tags/stable_0_2_0_rc1
85	Added dumphex.	lampret	8532d 12h	/or1k/tags/stable_0_2_0_rc1
84	Update.	lampret	8532d 12h	/or1k/tags/stable_0_2_0_rc1
83	Updates.	lampret	8532d 12h	/or1k/tags/stable_0_2_0_rc1
82	Changed pctemp to pcnext.	lampret	8532d 12h	/or1k/tags/stable_0_2_0_rc1
80	First import.	lampret	8560d 07h	/or1k/tags/stable_0_2_0_rc1
79	Data and instruction cache simulation added.	lampret	8562d 04h	/or1k/tags/stable_0_2_0_rc1
78	(i/d)tlb_status	lampret	8685d 18h	/or1k/tags/stable_0_2_0_rc1
77	Regular update.	lampret	8685d 18h	/or1k/tags/stable_0_2_0_rc1
76	regular update	lampret	8685d 18h	/or1k/tags/stable_0_2_0_rc1
75	simgetstr added. eval_mem32 replaced with evalsim_mem32.	lampret	8685d 18h	/or1k/tags/stable_0_2_0_rc1
74	Same as DMMU.	lampret	8692d 18h	/or1k/tags/stable_0_2_0_rc1
73	Fixed all bugs. Now more or less works. IMMU still has some problems (exception start).	lampret	8692d 18h	/or1k/tags/stable_0_2_0_rc1
72	Added 'how to build GNU tools'	lampret	8697d 18h	/or1k/tags/stable_0_2_0_rc1
71	Clean two typos.	lampret	8702d 20h	/or1k/tags/stable_0_2_0_rc1