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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [insight] - Rev 371

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Rev Log message Author Age Path
371 steps toward joining or32.c and opcode/or32.h of or1ksim and gdb; decode.c moved to or32.c markom 8295d 23h /or1k/tags/stable_0_2_0_rc2/insight
364 info spr bug fixed markom 8300d 18h /or1k/tags/stable_0_2_0_rc2/insight
363 program can be stepped and continued before running it, supporting low level debugging markom 8300d 18h /or1k/tags/stable_0_2_0_rc2/insight
362 some changes based on current modifications to or1k; cleaner register naming; ctrl-c causes stepi; write&read pc work on next instruction markom 8301d 00h /or1k/tags/stable_0_2_0_rc2/insight
355 uart VAPI model improved; changes to MC and eth. markom 8301d 21h /or1k/tags/stable_0_2_0_rc2/insight
344 added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model markom 8307d 21h /or1k/tags/stable_0_2_0_rc2/insight
263 configure for cpu; modified command line options markom 8319d 19h /or1k/tags/stable_0_2_0_rc2/insight
262 small bug in build_automata fixed; configure for memory markom 8319d 20h /or1k/tags/stable_0_2_0_rc2/insight
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8328d 22h /or1k/tags/stable_0_2_0_rc2/insight
207 Several major changes to allow gdb to work with an Or1k implementation
that does not need a writeable PC. This version will use the breakpoint
vector and install a new vector into the EPC register, and then single
step out of the breakpoint exception. The breakpoint exception vector
must include only 2 commands: l.rfe and l.nop. Anything else and this
gdb version will fail w/ or1ksim.		 chris 8356d 00h /or1k/tags/stable_0_2_0_rc2/insight
174 Few changes that should be done previously:
- machine.h replaced by spr_defs.h
- if reset label does not exist, boot from 0x0100		 markom 8397d 22h /or1k/tags/stable_0_2_0_rc2/insight
151 Typo in the previous commit. Sorry. chris 8448d 02h /or1k/tags/stable_0_2_0_rc2/insight
150 Fixed some single stepping issues chris 8448d 02h /or1k/tags/stable_0_2_0_rc2/insight
149 Fixed bug where disassemble command caused a segmentation fault chris 8449d 04h /or1k/tags/stable_0_2_0_rc2/insight
146 Mofications to work with or1ksim JTAG based simulation chris 8449d 20h /or1k/tags/stable_0_2_0_rc2/insight
144 Modifications necessary for functional gdb interface chris 8449d 20h /or1k/tags/stable_0_2_0_rc2/insight
143 Modifications necessary to work with JTAG or1ksim simulator chris 8449d 20h /or1k/tags/stable_0_2_0_rc2/insight
141 Added l_trap() chris 8449d 21h /or1k/tags/stable_0_2_0_rc2/insight
138 - on the fly insn decoding
- removed asm input file support
- removed string from execution
- speedup of loading		 markom 8453d 00h /or1k/tags/stable_0_2_0_rc2/insight
136 Fixed the DSR/DRR debug register definitions which were stored backwards chris 8453d 23h /or1k/tags/stable_0_2_0_rc2/insight

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