OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [or1ksim/] [peripheral/] - Rev 1780

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5598d 10h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1611 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc2'. 6798d 20h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1606 fix uninitialized reads phoenix 6799d 19h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1598 Handle ethernet addresses as an address and not as an int nogj 6818d 16h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1586 Charles Qi
Fix memory handling on big endian machines
nogj 6829d 18h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1576 configure updates phoenix 6857d 10h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1567 Hush noisy message that was making test think that the ethernet test failed nogj 6879d 16h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1564 Fix internal clock handling nogj 6879d 16h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1563 Fix sending too many interrupts in the uart nogj 6879d 16h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1557 Fix most warnings issued by gcc4 nogj 6881d 00h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1556 Create an 8-bit program load function to be able to load an unaligned section nogj 6881d 00h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1549 Spelling fixes nogj 6942d 13h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1519 Add a usefull trace to the mc nogj 6947d 21h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1518 Print a '\n' at the end of the trace nogj 6947d 21h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1517 Use uint8_t instead of char nogj 6947d 21h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1505 Make output clearer nogj 6962d 20h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1504 Use proper types nogj 6962d 20h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1503 Move loopback handling out of uart_clock16 nogj 6962d 20h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1502 Move interrupt handling out of uart_clock16 nogj 6962d 20h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral
1501 Move RX logic out of uart_clock16 nogj 6962d 20h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.