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[/] [or1k/] [tags/] [stable_0_2_0_rc2] - Rev 167

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Rev Log message Author Age Path
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed		 markom 8377d 07h /or1k/tags/stable_0_2_0_rc2
166 Fixed RAM's oen bug. Cache bypass under development. lampret 8394d 17h /or1k/tags/stable_0_2_0_rc2
165 Added variable ack of WB transfers (see NODELAY_WBx). lampret 8394d 18h /or1k/tags/stable_0_2_0_rc2
164 *** empty log message *** lampret 8396d 20h /or1k/tags/stable_0_2_0_rc2
163 Forgot files.f file. lampret 8396d 20h /or1k/tags/stable_0_2_0_rc2
162 Benches (under development). lampret 8396d 20h /or1k/tags/stable_0_2_0_rc2
161 Development version of RTL. Libraries are missing. lampret 8396d 20h /or1k/tags/stable_0_2_0_rc2
160 simulation script lampret 8396d 20h /or1k/tags/stable_0_2_0_rc2
159 synthesis scripts lampret 8396d 20h /or1k/tags/stable_0_2_0_rc2
158 Initial RTEMS import chris 8406d 11h /or1k/tags/stable_0_2_0_rc2
157 Update simons 8413d 14h /or1k/tags/stable_0_2_0_rc2
156 File moved to opcode. simons 8413d 14h /or1k/tags/stable_0_2_0_rc2
155 Update simons 8413d 14h /or1k/tags/stable_0_2_0_rc2
154 Updated for new runtime environment chris 8419d 14h /or1k/tags/stable_0_2_0_rc2
153 Writes to SPR_PC are now enabled chris 8419d 14h /or1k/tags/stable_0_2_0_rc2
152 Breakpoint exceptions from single step are not printed now. chris 8419d 14h /or1k/tags/stable_0_2_0_rc2
151 Typo in the previous commit. Sorry. chris 8419d 14h /or1k/tags/stable_0_2_0_rc2
150 Fixed some single stepping issues chris 8419d 14h /or1k/tags/stable_0_2_0_rc2
149 Fixed bug where disassemble command caused a segmentation fault chris 8420d 16h /or1k/tags/stable_0_2_0_rc2
148 Replace single stepping patch that got overwritten chris 8420d 17h /or1k/tags/stable_0_2_0_rc2

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