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[/] [or1k/] [tags/] [stable_0_2_0_rc2] - Rev 23

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23 Common OR1K backend for OR32 and OR16. lampret 8827d 21h /or1k/tags/stable_0_2_0_rc2
22 More modifications related to or16. lampret 8830d 03h /or1k/tags/stable_0_2_0_rc2
21 More modifications related to or16. cmchen 8830d 03h /or1k/tags/stable_0_2_0_rc2
20 or1k renamed to or32. lampret 8830d 17h /or1k/tags/stable_0_2_0_rc2
19 Added or16, or1k renamed to or32. lampret 8830d 17h /or1k/tags/stable_0_2_0_rc2
18 or16 added, or1k renamed to or32. lampret 8830d 17h /or1k/tags/stable_0_2_0_rc2
17 Re-generated. jrydberg 8853d 13h /or1k/tags/stable_0_2_0_rc2
16 Add support for systems without readline. To use GNU readline library,
use the `--enable-readline' option to the configure script.		 jrydberg 8853d 13h /or1k/tags/stable_0_2_0_rc2
15 Initial revision. jrydberg 8890d 04h /or1k/tags/stable_0_2_0_rc2
14 First import. lampret 8890d 06h /or1k/tags/stable_0_2_0_rc2
13 Rebuild of the generated files. jrydberg 8891d 09h /or1k/tags/stable_0_2_0_rc2
12 Added information to the section about how to configure and compile
the package.		 jrydberg 8891d 09h /or1k/tags/stable_0_2_0_rc2
11 Rebuild from configure.in. jrydberg 8891d 09h /or1k/tags/stable_0_2_0_rc2
10 Support for both architectures. Specify architecture with the
--target option.		 jrydberg 8891d 09h /or1k/tags/stable_0_2_0_rc2
9 Added support for OpenRISC 100 and DLX. jrydberg 8891d 09h /or1k/tags/stable_0_2_0_rc2
8 Initial revision. jrydberg 8891d 09h /or1k/tags/stable_0_2_0_rc2
7 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.		 jrydberg 8891d 09h /or1k/tags/stable_0_2_0_rc2
6 Just a regular update with exception of cache simulation. MMU simulation still under development. lampret 8892d 03h /or1k/tags/stable_0_2_0_rc2
5 Data and instruction cache simulation added. lampret 8892d 03h /or1k/tags/stable_0_2_0_rc2
4 no message lampret 8942d 07h /or1k/tags/stable_0_2_0_rc2

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