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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [gen_or1k_isa/] - Rev 1765

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Rev	Log message	Author	Age	Path
1765		root	5599d 07h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1648	This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc3'.		6746d 10h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1646	This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'.		6746d 10h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1605	Execute l.ff1 instruction	nogj	6807d 12h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1601	fixed description of l.sfXXXi	lampret	6809d 15h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1597	Fix parsing the destination register	nogj	6819d 14h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1591	Added l.fl1, fixed desc of l.ff1	lampret	6822d 11h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1590	Added l.fl1	lampret	6822d 11h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1557	Fix most warnings issued by gcc4	nogj	6881d 21h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1554	fixed l.maci encoding	phoenix	6899d 08h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1475	l.rfe does not have a delay slot. Don't mark it as such.	nogj	7012d 11h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1452	Implement a dynamic recompiler to speed up the execution	nogj	7039d 14h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1440	Reclasify l.trap and l.sys to be an exception instruction	nogj	7039d 14h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1385	Fix description of the l.mac/l.msb/l.maci instructions	nogj	7054d 18h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1384	Fix the parameters to the l.ff1/l.maci instructions	nogj	7054d 18h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1350	Mark a simulated cpu address as such, by introducing the new oraddr_t type	nogj	7089d 12h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1346	Remove the global op structure	nogj	7102d 16h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1342	* Fix generate.c to produce a execgen.c with less warnings. * Fix the --enable-simple configure option.	nogj	7102d 17h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1341	Mark wich operand is the destination operand in the architechture definition	nogj	7102d 17h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa
1338	l.ff1 instruction added	andreje	7118d 14h	/or1k/tags/stable_0_2_0_rc3/gen_or1k_isa

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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [gen_or1k_isa/] - Rev 1765

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