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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [cpu/] [common/] [abstract.c] - Rev 1765

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1765 root 5630d 05h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1648 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc3'. 6777d 08h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6777d 08h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1584 usability improvments phoenix 6868d 05h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1557 Fix most warnings issued by gcc4 nogj 6912d 19h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1556 Create an 8-bit program load function to be able to load an unaligned section nogj 6912d 19h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1487 Remove useless *breakpoint argument from the {set,eval}_direct* functions nogj 7017d 20h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.		 nogj 7022d 17h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1484 Use the {set,eval}_direct* functions where they are supposed to be used nogj 7028d 11h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1452 Implement a dynamic recompiler to speed up the execution nogj 7070d 12h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1446 Cosmetic fixes nogj 7070d 12h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7070d 12h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1386 Rework exception handling nogj 7076d 16h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1375 Remove FAST_SIM, it nolonger provides a speed up nogj 7111d 07h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1362 initialise dev_mem->chip_select in register_memory nogj 7111d 07h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1359 Pass private data in readfunc/writefunc callbacks nogj 7111d 07h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7111d 07h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1354 typing fixes phoenix 7119d 13h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7120d 10h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7133d 14h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/common/abstract.c

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