OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [cpu] - Rev 26

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
26 Clean up. lampret 8834d 18h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu
25 Bug fix in handling labels when loading code into simulator memory. lampret 8834d 18h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu
24 Static branch prediction added. lampret 8834d 18h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu
23 Common OR1K backend for OR32 and OR16. lampret 8834d 18h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu
22 More modifications related to or16. lampret 8837d 00h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu
20 or1k renamed to or32. lampret 8837d 13h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu
19 Added or16, or1k renamed to or32. lampret 8837d 13h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu
18 or16 added, or1k renamed to or32. lampret 8837d 14h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu
13 Rebuild of the generated files. jrydberg 8898d 06h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu
8 Initial revision. jrydberg 8898d 06h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu
7 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.		 jrydberg 8898d 06h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu
6 Just a regular update with exception of cache simulation. MMU simulation still under development. lampret 8899d 00h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu
3 This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches.		 cvs 9024d 18h /or1k/tags/stable_0_2_0_rc3/or1ksim/cpu

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.