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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [mmu] - Rev 1099

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Rev Log message Author Age Path
1099 cvs bug fixed markom 7896d 08h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
997 PRINTF should be used instead of printf; command redirection repaired markom 7998d 11h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
970 Testbench is now running on ORP architecture platform. simons 8005d 22h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
886 MMU registers reserved fields protected from writing. simons 8042d 03h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
884 code cleaning - a lot of global variables moved to runtime struct markom 8042d 09h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
876 Beta release of ATA simulation rherveille 8049d 21h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
713 lot of small minor improvements: code documented, cleaned; runs at about same speed when not actually logging, but exe_log is enabled; raw_stats now run only with simple execution - enable RAW_USAGE_STATS macro markom 8170d 10h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
638 TLBTR CI bit is now working properly. simons 8200d 23h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
600 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8213d 21h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
572 Some new bugs fixed. simons 8218d 22h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
541 lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES! markom 8225d 07h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
535 stats is updated; statical single stats removed; t command output cleaned, added time output; cycles is moved to instructions; cycles now count time markom 8226d 05h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
517 some performance optimizations markom 8229d 06h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
500 Added .cvsignore files for annoying generated files erez 8231d 09h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
456 Page size bug fixed. simons 8250d 01h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
446 ITLBMR register bit fields set in order. simons 8251d 11h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
438 ITLB -> DTLB lapsus fixed. simons 8252d 06h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
430 dpfault and ipfault exceptions implemented markom 8253d 05h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
429 cache configuration added markom 8253d 05h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu
425 immu and dmmu configurations added markom 8253d 07h /or1k/tags/stable_0_2_0_rc3/or1ksim/mmu

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