OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [support/] [dumpverilog.c] - Rev 138

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
138 - on the fly insn decoding
- removed asm input file support
- removed string from execution
- speedup of loading
markom 8421d 00h /or1k/tags/stable_0_2_0_rc3/or1ksim/support/dumpverilog.c
123 Bugs fixed:
- l.rfe temporarly disables exceptions
- l.sys does PC -= 4
- breakpoints now supported at peripheria locations
- uart0.rt/.tx nonexistent file segment fault

Other modifications:
- replaced string names to instruction indexes
- execute.c executes specified (in ISA table) function
- modified ISA table - flag needed for gdb
- added or32.c, which supports or32.h
- added new instructions l.mac, l.msb, l.maci, l.macrc
and their executing functions (opcodes to be revisited)
- added header acconfig.h
- modified configuration files
markom 8430d 19h /or1k/tags/stable_0_2_0_rc3/or1ksim/support/dumpverilog.c
85 Added dumphex. lampret 8502d 20h /or1k/tags/stable_0_2_0_rc3/or1ksim/support/dumpverilog.c
75 simgetstr added. eval_mem32 replaced with evalsim_mem32. lampret 8656d 02h /or1k/tags/stable_0_2_0_rc3/or1ksim/support/dumpverilog.c
60 Memory model changed. lampret 8710d 05h /or1k/tags/stable_0_2_0_rc3/or1ksim/support/dumpverilog.c
55 Added 'dv' command for dumping memory as verilog model. lampret 8726d 02h /or1k/tags/stable_0_2_0_rc3/or1ksim/support/dumpverilog.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.