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[/] [or1k/] [tags/] [stable_0_2_0_rc3] - Rev 410

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410 MMU test added. simons 8255d 19h /or1k/tags/stable_0_2_0_rc3
409 some minor changes to or1ksim; Testbench except.s modified. Interrupt test almost finished for uart ACV. markom 8256d 02h /or1k/tags/stable_0_2_0_rc3
408 Fixed errant rx_bd_num erez 8256d 22h /or1k/tags/stable_0_2_0_rc3
406 Renamed ethernet's RX_BD_ADR to RX_BD_NUM erez 8257d 01h /or1k/tags/stable_0_2_0_rc3
405 Stepping trough l.jal and l.jalr fixed. simons 8258d 02h /or1k/tags/stable_0_2_0_rc3
404 is_delayed() is used outside this file. simons 8258d 02h /or1k/tags/stable_0_2_0_rc3
403 Prompt changed because ddd requires (gdb). simons 8258d 02h /or1k/tags/stable_0_2_0_rc3
402 Added OR1200_GENERIC_MULTP2_32X32 and OR1200_ASIC_MULTP2_32X32 lampret 8258d 07h /or1k/tags/stable_0_2_0_rc3
401 *** empty log message *** simons 8261d 17h /or1k/tags/stable_0_2_0_rc3
400 force_dslot_fetch does not work - allways zero. simons 8261d 17h /or1k/tags/stable_0_2_0_rc3
399 Trap insn couses break after exits ex_insn. simons 8261d 17h /or1k/tags/stable_0_2_0_rc3
398 added register field defines ivang 8263d 22h /or1k/tags/stable_0_2_0_rc3
397 removed or16 architecture markom 8263d 23h /or1k/tags/stable_0_2_0_rc3
396 added missing file markom 8264d 01h /or1k/tags/stable_0_2_0_rc3
395 removed obsolete dependency and history from cpu section markom 8264d 03h /or1k/tags/stable_0_2_0_rc3
394 dependency joined with dependstats; history moved to sim section markom 8264d 05h /or1k/tags/stable_0_2_0_rc3
393 messages: exception on many places changed to abort markom 8264d 05h /or1k/tags/stable_0_2_0_rc3
391 Fixed except_stop width and fixed EX PC for 1400444f no-ops. lampret 8264d 12h /or1k/tags/stable_0_2_0_rc3
390 Changed instantiation name of VS RAMs. lampret 8264d 14h /or1k/tags/stable_0_2_0_rc3
389 Changed default delay for load and store in superscalar cpu. lampret 8264d 14h /or1k/tags/stable_0_2_0_rc3

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