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[/] [or1k/] [tags/] [tn_m001/] [or1ksim/] [toplevel.c] - Rev 78

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78 (i/d)tlb_status lampret 8657d 21h /or1k/tags/tn_m001/or1ksim/toplevel.c
69 Sim debug. lampret 8676d 20h /or1k/tags/tn_m001/or1ksim/toplevel.c
54 Regular maintenance. lampret 8727d 21h /or1k/tags/tn_m001/or1ksim/toplevel.c
46 Added srand(). lampret 8788d 17h /or1k/tags/tn_m001/or1ksim/toplevel.c
30 Updated SPRs, exceptions. Added 16450 device. lampret 8804d 06h /or1k/tags/tn_m001/or1ksim/toplevel.c
28 Adding COFF loader. lampret 8819d 03h /or1k/tags/tn_m001/or1ksim/toplevel.c
21 More modifications related to or16. cmchen 8837d 07h /or1k/tags/tn_m001/or1ksim/toplevel.c
18 or16 added, or1k renamed to or32. lampret 8837d 20h /or1k/tags/tn_m001/or1ksim/toplevel.c
16 Add support for systems without readline. To use GNU readline library,
use the `--enable-readline' option to the configure script.		 jrydberg 8860d 17h /or1k/tags/tn_m001/or1ksim/toplevel.c
7 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.		 jrydberg 8898d 12h /or1k/tags/tn_m001/or1ksim/toplevel.c
6 Just a regular update with exception of cache simulation. MMU simulation still under development. lampret 8899d 07h /or1k/tags/tn_m001/or1ksim/toplevel.c
3 This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches.		 cvs 9025d 00h /or1k/tags/tn_m001/or1ksim/toplevel.c
2 First import. cvs 9025d 00h /or1k/tags/tn_m001/or1ksim/toplevel.c

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