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[/] [or1k/] [trunk/] [gen_or1k_isa/] [sources] - Rev 1656

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1656 Pass the instruction operands as part of the op_queue structure. nogj 6875d 15h /or1k/trunk/gen_or1k_isa/sources
1605 Execute l.ff1 instruction nogj 6937d 16h /or1k/trunk/gen_or1k_isa/sources
1601 fixed description of l.sfXXXi lampret 6939d 19h /or1k/trunk/gen_or1k_isa/sources
1597 Fix parsing the destination register nogj 6949d 18h /or1k/trunk/gen_or1k_isa/sources
1591 Added l.fl1, fixed desc of l.ff1 lampret 6952d 15h /or1k/trunk/gen_or1k_isa/sources
1590 Added l.fl1 lampret 6952d 15h /or1k/trunk/gen_or1k_isa/sources
1557 Fix most warnings issued by gcc4 nogj 7012d 01h /or1k/trunk/gen_or1k_isa/sources
1554 fixed l.maci encoding phoenix 7029d 12h /or1k/trunk/gen_or1k_isa/sources
1475 l.rfe does not have a delay slot. Don't mark it as such. nogj 7142d 15h /or1k/trunk/gen_or1k_isa/sources
1452 Implement a dynamic recompiler to speed up the execution nogj 7169d 18h /or1k/trunk/gen_or1k_isa/sources
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7169d 18h /or1k/trunk/gen_or1k_isa/sources
1385 Fix description of the l.mac/l.msb/l.maci instructions nogj 7184d 22h /or1k/trunk/gen_or1k_isa/sources
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7184d 22h /or1k/trunk/gen_or1k_isa/sources
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7219d 16h /or1k/trunk/gen_or1k_isa/sources
1346 Remove the global op structure nogj 7232d 20h /or1k/trunk/gen_or1k_isa/sources
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7232d 20h /or1k/trunk/gen_or1k_isa/sources
1341 Mark wich operand is the destination operand in the architechture definition nogj 7232d 21h /or1k/trunk/gen_or1k_isa/sources
1338 l.ff1 instruction added andreje 7248d 18h /or1k/trunk/gen_or1k_isa/sources
1309 removed includes phoenix 7421d 14h /or1k/trunk/gen_or1k_isa/sources
1308 Gyorgy Jeney: extensive cleanup phoenix 7424d 11h /or1k/trunk/gen_or1k_isa/sources

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