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[/] [or1k/] [trunk/] [or1ksim/] [cpu/] [or1k/] [except.h] - Rev 1765

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1765 root 5647d 20h /or1k/trunk/or1ksim/cpu/or1k/except.h
1751 These are the changes to support Or1ksim 0.3.0rc2. Most significantly they provide GDB RSP support. They also fix 5 outstanding bugs and satisfy one new feature request. jeremybennett 5767d 05h /or1k/trunk/or1ksim/cpu/or1k/except.h
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.		 jeremybennett 5797d 01h /or1k/trunk/or1ksim/cpu/or1k/except.h
1452 Implement a dynamic recompiler to speed up the execution nogj 7088d 02h /or1k/trunk/or1ksim/cpu/or1k/except.h
1386 Rework exception handling nogj 7094d 06h /or1k/trunk/or1ksim/cpu/or1k/except.h
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7138d 01h /or1k/trunk/or1ksim/cpu/or1k/except.h
599 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8254d 19h /or1k/trunk/or1ksim/cpu/or1k/except.h
479 connection with gdb repaired; temp_except_delay removed; lot of except and debug code cleaned; sys 203 causes stall under gdb; non-sim memory area log bug fixed markom 8286d 04h /or1k/trunk/or1ksim/cpu/or1k/except.h
437 When lsu instruction produce exception registers are preserved. simons 8293d 04h /or1k/trunk/or1ksim/cpu/or1k/except.h
261 modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc markom 8333d 08h /or1k/trunk/or1ksim/cpu/or1k/except.h
137 Added TRAP exception chris 8467d 08h /or1k/trunk/or1ksim/cpu/or1k/except.h
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8501d 13h /or1k/trunk/or1ksim/cpu/or1k/except.h
99 *** empty log message *** lampret 8516d 14h /or1k/trunk/or1ksim/cpu/or1k/except.h
77 Regular update. lampret 8701d 11h /or1k/trunk/or1ksim/cpu/or1k/except.h
64 SPR bit definition moved to spr_defs.h. lampret 8720d 11h /or1k/trunk/or1ksim/cpu/or1k/except.h
54 Regular maintenance. lampret 8771d 11h /or1k/trunk/or1ksim/cpu/or1k/except.h
49 Changed simulation mode to non-virtual (real). lampret 8832d 07h /or1k/trunk/or1ksim/cpu/or1k/except.h
38 Virtual machine at the moment. lampret 8843d 18h /or1k/trunk/or1ksim/cpu/or1k/except.h
33 Handling of or1k exceptions. lampret 8847d 17h /or1k/trunk/or1ksim/cpu/or1k/except.h

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