OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk] - Rev 57

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
57 This commit was generated by cvs2svn to compensate for changes in r56, which
included commits to RCS files with non-trunk default branches.		 joel 8805d 19h /or1k/trunk
55 Added 'dv' command for dumping memory as verilog model. lampret 8815d 07h /or1k/trunk
54 Regular maintenance. lampret 8815d 07h /or1k/trunk
53 Added setjmp/longjmp. lampret 8820d 07h /or1k/trunk
52 Comment character changed. lampret 8876d 03h /or1k/trunk
51 Exception detection changed a bit. lampret 8876d 03h /or1k/trunk
50 Added CURINSN macro. lampret 8876d 03h /or1k/trunk
49 Changed simulation mode to non-virtual (real). lampret 8876d 03h /or1k/trunk
48 Added CCR. lampret 8876d 03h /or1k/trunk
47 Added interrupt recognition and better memory dump. lampret 8876d 03h /or1k/trunk
46 Added srand(). lampret 8876d 03h /or1k/trunk
45 Added NONE. lampret 8876d 03h /or1k/trunk
44 %s bug fixed. lampret 8881d 08h /or1k/trunk
43 SUPV bit from SR is now saved into EPCR bit 0. lampret 8886d 12h /or1k/trunk
42 Bug fix. Only symbols with names shorter than 9 characters are loaded. lampret 8886d 12h /or1k/trunk
41 Bug fix. Now all COFF sections are loaded not just .text. lampret 8887d 09h /or1k/trunk
40 This commit was generated by cvs2svn to compensate for changes in r39, which
included commits to RCS files with non-trunk default branches.		 lampret 8887d 13h /or1k/trunk
38 Virtual machine at the moment. lampret 8887d 14h /or1k/trunk
37 STACK_SIZE is not properly used (will be removed soon). lampret 8887d 14h /or1k/trunk
36 Fixed bug when loading "data" from .text segment (all insns are not only
decoded but also placed in simulator memory undecoded as data).		 lampret 8887d 14h /or1k/trunk

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.