OpenCores
URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] [or1k_old/] [trunk] - Rev 1592

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1592 Added additional desc of tick timer, added l.fl1, corrected desc of l.ff1 and corrected encoding of l.maci lampret 6828d 07h /or1k_old/trunk
1591 Added l.fl1, fixed desc of l.ff1 lampret 6829d 02h /or1k_old/trunk
1590 Added l.fl1 lampret 6829d 02h /or1k_old/trunk
1589 Make -d channel be equivalent to -d +channel nogj 6832d 13h /or1k_old/trunk
1588 Correct INT_MAX->INT32_MAX nogj 6832d 14h /or1k_old/trunk
1587 Supports two RAM banks by Jacob Bower jcastillo 6836d 03h /or1k_old/trunk
1586 Charles Qi
Fix memory handling on big endian machines		 nogj 6837d 06h /or1k_old/trunk
1585 added missing exception, fixes segfault with trap exception phoenix 6842d 22h /or1k_old/trunk
1584 usability improvments phoenix 6843d 21h /or1k_old/trunk
1583 First Import jcastillo 6844d 09h /or1k_old/trunk
1582 Added support for RAMB16 Xilinx4/Spartan3 primitives jcastillo 6844d 09h /or1k_old/trunk
1581 Added support for rc200 board by Jacob Bower jcastillo 6845d 14h /or1k_old/trunk
1580 Stephan Bourduas
* Fix starting instruction logger from > 2^31 - 1 instructions
* Fix `run x' command, where x > 2^31.

nog.		 nogj 6852d 14h /or1k_old/trunk
1579 Add missing break; statements nogj 6864d 09h /or1k_old/trunk
1578 Put consecutive asm statements into one __asm__() block to prevent gcc from scheduleing other instructions between them. nogj 6864d 09h /or1k_old/trunk
1577 gcc4 compile fix nogj 6864d 09h /or1k_old/trunk
1576 configure updates phoenix 6864d 22h /or1k_old/trunk
1575 no message jcastillo 6877d 20h /or1k_old/trunk
1574 Add ptrace implementation nogj 6880d 03h /or1k_old/trunk
1573 Fix kernel stack creep nogj 6880d 03h /or1k_old/trunk

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.