URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [sw/] [adv_jtag_bridge/] [sim_lib/] [modelsim_linux_x86/] [Makefile] - Rev 12

Rev	Log message	Author	Age	Path
12	check-in SoC source	xianfeng	5328d 18h	/or1k_soc_on_altera_embedded_dev_kit/trunk/soc/sw/adv_jtag_bridge/sim_lib/modelsim_linux_x86/Makefile