URL https://opencores.org/ocsvn/ourisc/ourisc/trunk

Subversion Repositories ourisc

[/] [ourisc/] [trunk/] [rtl] - Rev 12

Rev	Log message	Author	Age	Path
12	Fix heading.	joaocarlos	4023d 21h	/ourisc/trunk/rtl
11	Code refactoring and header fixing.	joaocarlos	4023d 21h	/ourisc/trunk/rtl
10	Non synthetizable memory used for simulation issues.	joaocarlos	4023d 21h	/ourisc/trunk/rtl
9	Fix port names and header.	joaocarlos	4023d 21h	/ourisc/trunk/rtl
8	Fix header.	joaocarlos	4023d 21h	/ourisc/trunk/rtl
7	Program counter.	joaocarlos	4023d 21h	/ourisc/trunk/rtl
6	Fix coding sintax.	joaocarlos	4023d 21h	/ourisc/trunk/rtl
5	uRISC predefined processor flags.	joaocarlos	4051d 22h	/ourisc/trunk/rtl
4	Basic uRISC instruction set opcodes.	joaocarlos	4051d 22h	/ourisc/trunk/rtl
3	missing and should wasn't to be commited iet.	joaocarlos	4051d 22h	/ourisc/trunk/rtl
2	Common primitive processor components.	joaocarlos	4051d 22h	/ourisc/trunk/rtl