URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [asyst_2/] [rtl/] [verilog/] [pci_io_mux.v] - Rev 77

Rev	Log message	Author	Age	Path
77	Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.	mihad	7831d 11h	/pci/tags/asyst_2/rtl/verilog/pci_io_mux.v
21	Repaired a few bugs, updated specification, added test bench files and design document	mihad	8191d 12h	/pci/tags/asyst_2/rtl/verilog/pci_io_mux.v
6	Updated all files with inclusion of timescale file for simulation purposes.	mihad	8310d 20h	/pci/tags/asyst_2/rtl/verilog/pci_io_mux.v
2	New project directory structure	mihad	8313d 12h	/pci/tags/asyst_2/rtl/verilog/pci_io_mux.v