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[/] [pci/] [tags/] [rel_11/] [rtl/] [verilog/] [pci_wbw_wbr_fifos.v] - Rev 122

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Rev Log message Author Age Path
122 mbist signals updated according to newest convention markom 7573d 05h /pci/tags/rel_11/rtl/verilog/pci_wbw_wbr_fifos.v
111 synchronizer_flop replaced with pci_synchronizer_flop, artisan ram instance updated. simons 7637d 01h /pci/tags/rel_11/rtl/verilog/pci_wbw_wbr_fifos.v
88 Added the reset value parameter to the synchronizer flop module.
Added resets to all synchronizer flop instances.
Repaired initial sync value in fifos.
mihad 7778d 01h /pci/tags/rel_11/rtl/verilog/pci_wbw_wbr_fifos.v
81 Updated synchronization in top level fifo modules. mihad 7832d 17h /pci/tags/rel_11/rtl/verilog/pci_wbw_wbr_fifos.v
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 7835d 22h /pci/tags/rel_11/rtl/verilog/pci_wbw_wbr_fifos.v

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