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[/] [pci/] [tags/] [rel_12/] [rtl/] - Rev 104

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Rev Log message Author Age Path
104 Found and simulated the problem in the synchronization logic.
Repaired the synchronization logic in the FIFOs.
mihad 7715d 17h /pci/tags/rel_12/rtl
94 Changed one critical PCI bus signal logic. mihad 7762d 15h /pci/tags/rel_12/rtl
88 Added the reset value parameter to the synchronizer flop module.
Added resets to all synchronizer flop instances.
Repaired initial sync value in fifos.
mihad 7840d 12h /pci/tags/rel_12/rtl
86 Entered the option to disable no response counter in wb master. mihad 7852d 10h /pci/tags/rel_12/rtl
83 Cleaned up the code. No functional changes. mihad 7881d 07h /pci/tags/rel_12/rtl
81 Updated synchronization in top level fifo modules. mihad 7895d 04h /pci/tags/rel_12/rtl
79 Updated. mihad 7898d 09h /pci/tags/rel_12/rtl
78 Old files with wrong names removed. mihad 7898d 09h /pci/tags/rel_12/rtl
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 7898d 09h /pci/tags/rel_12/rtl
73 Bug fixes, testcases added. mihad 7904d 09h /pci/tags/rel_12/rtl
72 *** empty log message *** mihad 7951d 13h /pci/tags/rel_12/rtl
71 Changed the code a bit to make it more readable.
Functionality not changed in any way.
More robust synchronization in fifos is still pending.
mihad 7959d 05h /pci/tags/rel_12/rtl
69 Changed BIST signal names etc.. mihad 7996d 13h /pci/tags/rel_12/rtl
68 Changed wrong signal name scanb_sen into scanb_en. tadejm 7999d 22h /pci/tags/rel_12/rtl
67 Changed BIST signals for RAMs. tadejm 8000d 03h /pci/tags/rel_12/rtl
66 Changed empty status generation in pciw_fifo_control.v mihad 8003d 13h /pci/tags/rel_12/rtl
65 Cleaned up non-blocking assignments in combinatinal logic statements mihad 8006d 11h /pci/tags/rel_12/rtl
63 Added additional testcase and changed rst name in BIST to trst mihad 8006d 15h /pci/tags/rel_12/rtl
62 Added BIST signals for RAMs. mihad 8009d 08h /pci/tags/rel_12/rtl
60 Added support for Virtual Silicon two port RAM. Didn't run regression on it yet! mihad 8017d 08h /pci/tags/rel_12/rtl

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