URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_3/] [rtl/] [verilog/] [pci_tpram.v] - Rev 60

Rev	Log message	Author	Age	Path
60	Added support for Virtual Silicon two port RAM. Didn't run regression on it yet!	mihad	7938d 23h	/pci/tags/rel_3/rtl/verilog/pci_tpram.v
49	Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives	mihad	7980d 23h	/pci/tags/rel_3/rtl/verilog/pci_tpram.v
18	* empty log message *	mihad	8180d 02h	/pci/tags/rel_3/rtl/verilog/pci_tpram.v