URL https://opencores.org/ocsvn/pci/pci/trunk

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[/] [pci/] [tags/] [rel_5/] [bench] - Rev 154

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Rev	Log message	Author	Age	Path
154	New directory structure.	root	5608d 16h	/pci/tags/rel_5/bench
82	This commit was manufactured by cvs2svn to create tag 'rel_5'.		7839d 02h	/pci/tags/rel_5/bench
81	Updated synchronization in top level fifo modules.	mihad	7839d 02h	/pci/tags/rel_5/bench
73	Bug fixes, testcases added.	mihad	7848d 08h	/pci/tags/rel_5/bench
69	Changed BIST signal names etc..	mihad	7940d 11h	/pci/tags/rel_5/bench
66	Changed empty status generation in pciw_fifo_control.v	mihad	7947d 12h	/pci/tags/rel_5/bench
64	The testcase I just added in previous revision repaired	mihad	7950d 12h	/pci/tags/rel_5/bench
63	Added additional testcase and changed rst name in BIST to trst	mihad	7950d 14h	/pci/tags/rel_5/bench
62	Added BIST signals for RAMs.	mihad	7953d 07h	/pci/tags/rel_5/bench
57	Added completion expiration test for WB Slave unit. Changed expiration signalling	mihad	7966d 15h	/pci/tags/rel_5/bench
54	Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim	mihad	8000d 08h	/pci/tags/rel_5/bench
52	Oops, never before noticed that OC header is missing	mihad	8000d 15h	/pci/tags/rel_5/bench
51	Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions.	mihad	8000d 15h	/pci/tags/rel_5/bench
45	Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image	mihad	8009d 13h	/pci/tags/rel_5/bench
44	Added for testing of Configuration Cycles Type 1	mihad	8009d 14h	/pci/tags/rel_5/bench
43	Removed - Interrupt acknowledge cycle now accepted by pci_behaviorial_device	mihad	8009d 14h	/pci/tags/rel_5/bench
35	Files updated with missing includes, resolved some race conditions in test bench	mihad	8154d 17h	/pci/tags/rel_5/bench
34	Added missing include statements	mihad	8169d 15h	/pci/tags/rel_5/bench
33	Added some testcases, removed un-needed fifo signals	mihad	8170d 13h	/pci/tags/rel_5/bench
26	Modified testbench and fixed some bugs	mihad	8184d 08h	/pci/tags/rel_5/bench

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Subversion Repositories pci

[/] [pci/] [tags/] [rel_5/] [bench] - Rev 154

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