URL https://opencores.org/ocsvn/pci/pci/trunk

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[/] [pci/] [tags/] [rel_6/] [bench/] - Rev 154

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Rev	Log message	Author	Age	Path
154	New directory structure.	root	5590d 16h	/pci/tags/rel_6/bench
112	This commit was manufactured by cvs2svn to create tag 'rel_6'.		7625d 11h	/pci/tags/rel_6/bench
107	Added status when checking disconnect with or without data. Before it was only retry, now there is stop and retry.	tadejm	7631d 08h	/pci/tags/rel_6/bench
106	Added limited WISHBONE B3 support for WISHBONE Slave Unit. Doesn't support full speed bursts yet.	mihad	7636d 06h	/pci/tags/rel_6/bench
104	Found and simulated the problem in the synchronization logic. Repaired the synchronization logic in the FIFOs.	mihad	7641d 16h	/pci/tags/rel_6/bench
92	Update!	mihad	7688d 22h	/pci/tags/rel_6/bench
89	Burst 2 error fixed.	mihad	7760d 12h	/pci/tags/rel_6/bench
87	Updated acording to RTL changes.	mihad	7778d 09h	/pci/tags/rel_6/bench
81	Updated synchronization in top level fifo modules.	mihad	7821d 02h	/pci/tags/rel_6/bench
73	Bug fixes, testcases added.	mihad	7830d 08h	/pci/tags/rel_6/bench
69	Changed BIST signal names etc..	mihad	7922d 11h	/pci/tags/rel_6/bench
66	Changed empty status generation in pciw_fifo_control.v	mihad	7929d 12h	/pci/tags/rel_6/bench
64	The testcase I just added in previous revision repaired	mihad	7932d 12h	/pci/tags/rel_6/bench
63	Added additional testcase and changed rst name in BIST to trst	mihad	7932d 14h	/pci/tags/rel_6/bench
62	Added BIST signals for RAMs.	mihad	7935d 07h	/pci/tags/rel_6/bench
57	Added completion expiration test for WB Slave unit. Changed expiration signalling	mihad	7948d 14h	/pci/tags/rel_6/bench
54	Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim	mihad	7982d 07h	/pci/tags/rel_6/bench
52	Oops, never before noticed that OC header is missing	mihad	7982d 15h	/pci/tags/rel_6/bench
51	Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions.	mihad	7982d 15h	/pci/tags/rel_6/bench
45	Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image	mihad	7991d 13h	/pci/tags/rel_6/bench

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[/] [pci/] [tags/] [rel_6/] [bench/] - Rev 154

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