OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_7/] [bench/] - Rev 104

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
104 Found and simulated the problem in the synchronization logic.
Repaired the synchronization logic in the FIFOs.		 mihad 7671d 14h /pci/tags/rel_7/bench
92 Update! mihad 7718d 20h /pci/tags/rel_7/bench
89 Burst 2 error fixed. mihad 7790d 10h /pci/tags/rel_7/bench
87 Updated acording to RTL changes. mihad 7808d 07h /pci/tags/rel_7/bench
81 Updated synchronization in top level fifo modules. mihad 7851d 00h /pci/tags/rel_7/bench
73 Bug fixes, testcases added. mihad 7860d 06h /pci/tags/rel_7/bench
69 Changed BIST signal names etc.. mihad 7952d 09h /pci/tags/rel_7/bench
66 Changed empty status generation in pciw_fifo_control.v mihad 7959d 10h /pci/tags/rel_7/bench
64 The testcase I just added in previous revision repaired mihad 7962d 10h /pci/tags/rel_7/bench
63 Added additional testcase and changed rst name in BIST to trst mihad 7962d 12h /pci/tags/rel_7/bench
62 Added BIST signals for RAMs. mihad 7965d 05h /pci/tags/rel_7/bench
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 7978d 12h /pci/tags/rel_7/bench
54 Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim mihad 8012d 05h /pci/tags/rel_7/bench
52 Oops, never before noticed that OC header is missing mihad 8012d 13h /pci/tags/rel_7/bench
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 8012d 13h /pci/tags/rel_7/bench
45 Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image mihad 8021d 11h /pci/tags/rel_7/bench
44 Added for testing of Configuration Cycles Type 1 mihad 8021d 12h /pci/tags/rel_7/bench
43 Removed - Interrupt acknowledge cycle now accepted by pci_behaviorial_device mihad 8021d 12h /pci/tags/rel_7/bench
35 Files updated with missing includes, resolved some race conditions in test bench mihad 8166d 15h /pci/tags/rel_7/bench
34 Added missing include statements mihad 8181d 13h /pci/tags/rel_7/bench

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.