URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_7/] [bench/] [verilog/] [wb_slave_behavioral.v] - Rev 104

Rev	Log message	Author	Age	Path
104	Found and simulated the problem in the synchronization logic. Repaired the synchronization logic in the FIFOs.	mihad	7648d 19h	/pci/tags/rel_7/bench/verilog/wb_slave_behavioral.v
92	Update!	mihad	7696d 01h	/pci/tags/rel_7/bench/verilog/wb_slave_behavioral.v
63	Added additional testcase and changed rst name in BIST to trst	mihad	7939d 17h	/pci/tags/rel_7/bench/verilog/wb_slave_behavioral.v
34	Added missing include statements	mihad	8158d 18h	/pci/tags/rel_7/bench/verilog/wb_slave_behavioral.v
15	Initial testbench import. Still under development	mihad	8191d 14h	/pci/tags/rel_7/bench/verilog/wb_slave_behavioral.v