OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_8/] [rtl] - Rev 49

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
49 Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives mihad 7998d 17h /pci/tags/rel_8/rtl
48 Extracted distributed RAM module from wb/pci_tpram.v to its own file mihad 7998d 17h /pci/tags/rel_8/rtl
47 Known issues repaired mihad 7998d 23h /pci/tags/rel_8/rtl
46 Include statement was enclosed in synosys translate off/on directive - repaired mihad 8003d 17h /pci/tags/rel_8/rtl
45 Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image mihad 8004d 23h /pci/tags/rel_8/rtl
35 Files updated with missing includes, resolved some race conditions in test bench mihad 8150d 02h /pci/tags/rel_8/rtl
33 Added some testcases, removed un-needed fifo signals mihad 8165d 22h /pci/tags/rel_8/rtl
32 Added include statement that was missing and causing errors mihad 8173d 19h /pci/tags/rel_8/rtl
26 Modified testbench and fixed some bugs mihad 8179d 17h /pci/tags/rel_8/rtl
23 *** empty log message *** mihad 8197d 18h /pci/tags/rel_8/rtl
21 Repaired a few bugs, updated specification, added test bench files and design document mihad 8197d 18h /pci/tags/rel_8/rtl
19 *** empty log message *** mihad 8197d 19h /pci/tags/rel_8/rtl
18 *** empty log message *** mihad 8197d 19h /pci/tags/rel_8/rtl
7 Updated all files with inclusion of timescale file for simulation purposes. mihad 8317d 02h /pci/tags/rel_8/rtl
6 Updated all files with inclusion of timescale file for simulation purposes. mihad 8317d 02h /pci/tags/rel_8/rtl
2 New project directory structure mihad 8319d 18h /pci/tags/rel_8/rtl

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.