URL https://opencores.org/ocsvn/pci/pci/trunk

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[/] [pci/] [tags/] [rel_WB_B3/] [bench/] [verilog/] [wb_slave_behavioral.v] - Rev 154

Rev	Log message	Author	Age	Path
154	New directory structure.	root	5602d 01h	/pci/tags/rel_WB_B3/bench/verilog/wb_slave_behavioral.v
121	This commit was manufactured by cvs2svn to create tag 'rel_WB_B3'.		7629d 13h	/pci/tags/rel_WB_B3/bench/verilog/wb_slave_behavioral.v
119	Added support for WB B3. Some testcases were updated.	tadejm	7629d 13h	/pci/tags/rel_WB_B3/bench/verilog/wb_slave_behavioral.v
104	Found and simulated the problem in the synchronization logic. Repaired the synchronization logic in the FIFOs.	mihad	7653d 01h	/pci/tags/rel_WB_B3/bench/verilog/wb_slave_behavioral.v
92	Update!	mihad	7700d 07h	/pci/tags/rel_WB_B3/bench/verilog/wb_slave_behavioral.v
63	Added additional testcase and changed rst name in BIST to trst	mihad	7943d 23h	/pci/tags/rel_WB_B3/bench/verilog/wb_slave_behavioral.v
34	Added missing include statements	mihad	8163d 00h	/pci/tags/rel_WB_B3/bench/verilog/wb_slave_behavioral.v
15	Initial testbench import. Still under development	mihad	8195d 20h	/pci/tags/rel_WB_B3/bench/verilog/wb_slave_behavioral.v