OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_WB_B3] - Rev 91

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
91 WebPack 5.2 constraint file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7788d 00h /pci/tags/rel_WB_B3
90 WebPack 5.2 project file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7788d 00h /pci/tags/rel_WB_B3
89 Burst 2 error fixed. mihad 7824d 01h /pci/tags/rel_WB_B3
88 Added the reset value parameter to the synchronizer flop module.
Added resets to all synchronizer flop instances.
Repaired initial sync value in fifos.		 mihad 7830d 00h /pci/tags/rel_WB_B3
87 Updated acording to RTL changes. mihad 7841d 22h /pci/tags/rel_WB_B3
86 Entered the option to disable no response counter in wb master. mihad 7841d 22h /pci/tags/rel_WB_B3
85 Changed Vendor ID defines. mihad 7842d 02h /pci/tags/rel_WB_B3
84 Changed vendor ID. mihad 7845d 20h /pci/tags/rel_WB_B3
83 Cleaned up the code. No functional changes. mihad 7870d 19h /pci/tags/rel_WB_B3
81 Updated synchronization in top level fifo modules. mihad 7884d 15h /pci/tags/rel_WB_B3
79 Updated. mihad 7887d 20h /pci/tags/rel_WB_B3
78 Old files with wrong names removed. mihad 7887d 20h /pci/tags/rel_WB_B3
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 7887d 20h /pci/tags/rel_WB_B3
76 TRDY output delay was 10 instead of 11. Repaired. mihad 7890d 20h /pci/tags/rel_WB_B3
75 Include statement moved out of off/on pragma as reported by Uwe. mihad 7893d 21h /pci/tags/rel_WB_B3
73 Bug fixes, testcases added. mihad 7893d 21h /pci/tags/rel_WB_B3
72 *** empty log message *** mihad 7941d 01h /pci/tags/rel_WB_B3
71 Changed the code a bit to make it more readable.
Functionality not changed in any way.
More robust synchronization in fifos is still pending.		 mihad 7948d 17h /pci/tags/rel_WB_B3
69 Changed BIST signal names etc.. mihad 7986d 00h /pci/tags/rel_WB_B3
68 Changed wrong signal name scanb_sen into scanb_en. tadejm 7989d 10h /pci/tags/rel_WB_B3

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.