URL https://opencores.org/ocsvn/pit/pit/trunk

Subversion Repositories pit

[/] [pit/] [trunk] - Rev 17

Rev	Log message	Author	Age	Path
17	Change WISHBONE ack signal so no output is generated when wait states are enabled and the bus transaction is terminated in the first cycle.	rehayes	5279d 01h	/pit/trunk
16	Added master error counter variable, added simulation timout limit	rehayes	5390d 04h	/pit/trunk
15	Fix blocking assigment	rehayes	5418d 05h	/pit/trunk
14	Cosmetic update, changed no-blocking assigment to blocking assigment	rehayes	5487d 02h	/pit/trunk
13	Update to rev 0.3, added SINGLE_CYCLE parameter	rehayes	5517d 06h	/pit/trunk
12	Fixed for single cycle reads	rehayes	5518d 01h	/pit/trunk
11	Changed read task to capture data at rising edge of clock	rehayes	5518d 01h	/pit/trunk
10	Added SINGLE_CYCLE parameter for WISHBONE bus cycles	rehayes	5519d 04h	/pit/trunk
9	fix problem with wb_wacc signal. Old method allowed data to be clocked into register twice.	rehayes	5524d 22h	/pit/trunk
8	Fix ack signal in testbench	rehayes	5524d 22h	/pit/trunk
7	Reflection of minor corrections	rehayes	5529d 04h	/pit/trunk
6	Reflection of minor corrections	rehayes	5529d 04h	/pit/trunk
5		rehayes	5567d 00h	/pit/trunk
4	Initial Release March 14, 2009 - Bob Hayes	rehayes	5567d 00h	/pit/trunk
3	Initial Release March 14, 2009 - Bob Hayes	rehayes	5567d 01h	/pit/trunk
2	Initial Release March 14, 2009 - Bob Hayes	rehayes	5567d 01h	/pit/trunk
1	The project was created and the structure was created	root	5567d 16h	/pit/trunk