URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [tags/] [V3_0/] [vhdl/] [mult.vhd] - Rev 139

Rev	Log message	Author	Age	Path
139	Major changes -- updated to Plasma Version 3	rhoads	6701d 04h	/plasma/tags/V3_0/vhdl/mult.vhd
132	Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly.	rhoads	7181d 03h	/plasma/tags/V3_0/vhdl/mult.vhd
128	Reset all registers, constants now upper case.	rhoads	7318d 14h	/plasma/tags/V3_0/vhdl/mult.vhd
121	Added Matthias Gruenewald's tri-state area-optimized option	rhoads	7479d 17h	/plasma/tags/V3_0/vhdl/mult.vhd
117	Part of Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA.	rhoads	7518d 04h	/plasma/tags/V3_0/vhdl/mult.vhd
99	correct upper 32-bits for mult(-1,-1)	rhoads	7938d 02h	/plasma/tags/V3_0/vhdl/mult.vhd
97	added documentation	rhoads	8007d 06h	/plasma/tags/V3_0/vhdl/mult.vhd
90	Now multiplies two bits at a time	rhoads	8043d 01h	/plasma/tags/V3_0/vhdl/mult.vhd
47	Altera	rhoads	8077d 04h	/plasma/tags/V3_0/vhdl/mult.vhd
45	Fixed signed 64-bit multiply	rhoads	8154d 17h	/plasma/tags/V3_0/vhdl/mult.vhd
43	Renamed M-lite to Plasma	rhoads	8157d 04h	/plasma/tags/V3_0/vhdl/mult.vhd
39	Changed name to M-lite to avoid trademark issues.	rhoads	8189d 09h	/plasma/tags/V3_0/vhdl/mult.vhd
23	Fixed div -x/y.	rhoads	8214d 02h	/plasma/tags/V3_0/vhdl/mult.vhd
18	Fixed "divu $3,$4". "Div $3,$4" still has bug if $3*$4<0.	rhoads	8216d 03h	/plasma/tags/V3_0/vhdl/mult.vhd
7	Made writes 4 cycles, improved mem_ctrl.vhd	rhoads	8231d 10h	/plasma/tags/V3_0/vhdl/mult.vhd
2	MIPS-lite CPU core	rhoads	8454d 09h	/plasma/tags/V3_0/vhdl/mult.vhd