URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [tags/] [V3_0/] [vhdl/] [tbench.vhd] - Rev 132

Rev	Log message	Author	Age	Path
132	Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly.	rhoads	7188d 14h	/plasma/tags/V3_0/vhdl/tbench.vhd
128	Reset all registers, constants now upper case.	rhoads	7326d 01h	/plasma/tags/V3_0/vhdl/tbench.vhd
106	better test mem_pause	rhoads	7802d 14h	/plasma/tags/V3_0/vhdl/tbench.vhd
102	permit testing mem_pause	rhoads	7803d 13h	/plasma/tags/V3_0/vhdl/tbench.vhd
55	Altera	rhoads	8066d 19h	/plasma/tags/V3_0/vhdl/tbench.vhd
51	GENERIC	rhoads	8077d 14h	/plasma/tags/V3_0/vhdl/tbench.vhd
48	Altera	rhoads	8077d 14h	/plasma/tags/V3_0/vhdl/tbench.vhd
47	Altera	rhoads	8084d 15h	/plasma/tags/V3_0/vhdl/tbench.vhd
43	Renamed M-lite to Plasma	rhoads	8164d 15h	/plasma/tags/V3_0/vhdl/tbench.vhd
39	Changed name to M-lite to avoid trademark issues.	rhoads	8196d 20h	/plasma/tags/V3_0/vhdl/tbench.vhd
8	Preparing to use dual-port memory for registers.	rhoads	8233d 15h	/plasma/tags/V3_0/vhdl/tbench.vhd
7	Made writes 4 cycles, improved mem_ctrl.vhd	rhoads	8238d 21h	/plasma/tags/V3_0/vhdl/tbench.vhd
6	JAL now correctly sets r31 to instruction AFTER branch delay slot. Fixed interrupts.	rhoads	8242d 19h	/plasma/tags/V3_0/vhdl/tbench.vhd
2	MIPS-lite CPU core	rhoads	8461d 20h	/plasma/tags/V3_0/vhdl/tbench.vhd