URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [trunk/] [vhdl/] - Rev 429

Rev	Log message	Author	Age	Path
429	Changed INIT bit length in RAM16X1D and RAM32X1D	rhoads	4027d 17h	/plasma/trunk/vhdl
428	Fix mult bugs "0*-1" and "-5%12".	rhoads	4042d 22h	/plasma/trunk/vhdl
404	Changed spacing	rhoads	4780d 13h	/plasma/trunk/vhdl
403	Disable Ethernet and cache when simulating.	rhoads	4780d 13h	/plasma/trunk/vhdl
397	Added RAM32X1D option	rhoads	4914d 07h	/plasma/trunk/vhdl
391	Better fix for 0x8000000 * negative number	rhoads	5066d 13h	/plasma/trunk/vhdl
390	Handle special case of signed mult of 0x80000000 and a negative number	rhoads	5069d 12h	/plasma/trunk/vhdl
383	Permit up to 64KB internal RAM and updated cache code.	rhoads	5076d 13h	/plasma/trunk/vhdl
377	Fix cache_we warning	rhoads	5219d 19h	/plasma/trunk/vhdl
376	Add write_enable to sensitivity list for Altera	rhoads	5219d 20h	/plasma/trunk/vhdl
374	Fixed comment	rhoads	5265d 09h	/plasma/trunk/vhdl
371		rhoads	5414d 22h	/plasma/trunk/vhdl
370	Fix "SLTIU v0, a0, -4000" by making imm signed	rhoads	5414d 23h	/plasma/trunk/vhdl
369	Simplify E_RX_CLK usage	rhoads	5420d 10h	/plasma/trunk/vhdl
365	Added UNISIM comment	rhoads	5478d 11h	/plasma/trunk/vhdl
356	Added space to align text	rhoads	5530d 10h	/plasma/trunk/vhdl
352		linus	5579d 03h	/plasma/trunk/vhdl
350		root	5607d 22h	/plasma/trunk/vhdl
348	Added comment for 32MB and 128MB DDR parts	rhoads	5638d 18h	/plasma/trunk/vhdl
347	Xilinx ISE Project file	rhoads	5638d 18h	/plasma/trunk/vhdl