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[/] [plasma/] [trunk/] [vhdl/] [mlite_cpu.vhd] - Rev 139

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Rev Log message Author Age Path
139 Major changes -- updated to Plasma Version 3 rhoads 6702d 14h /plasma/trunk/vhdl/mlite_cpu.vhd
132 Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly. rhoads 7182d 12h /plasma/trunk/vhdl/mlite_cpu.vhd
128 Reset all registers, constants now upper case. rhoads 7319d 23h /plasma/trunk/vhdl/mlite_cpu.vhd
124 Holger Lohn's fix for interrupts when 3-state pipeline enabled. rhoads 7338d 13h /plasma/trunk/vhdl/mlite_cpu.vhd
120 Make generics "GENERIC" rhoads 7481d 02h /plasma/trunk/vhdl/mlite_cpu.vhd
114 Matthias Grunewald's changes to get synthesis to work with Synopsys' FPGA Compiler II. rhoads 7519d 13h /plasma/trunk/vhdl/mlite_cpu.vhd
96 Simplify take_branch rhoads 8042d 17h /plasma/trunk/vhdl/mlite_cpu.vhd
83 Updated comments, accurate_timing on by default rhoads 8044d 11h /plasma/trunk/vhdl/mlite_cpu.vhd
73 pipeline, better reset rhoads 8052d 12h /plasma/trunk/vhdl/mlite_cpu.vhd
60 reset control rhoads 8060d 17h /plasma/trunk/vhdl/mlite_cpu.vhd
47 Altera rhoads 8078d 13h /plasma/trunk/vhdl/mlite_cpu.vhd
43 Renamed M-lite to Plasma rhoads 8158d 13h /plasma/trunk/vhdl/mlite_cpu.vhd
39 Changed name to M-lite to avoid trademark issues. rhoads 8190d 19h /plasma/trunk/vhdl/mlite_cpu.vhd

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