URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [trunk/] [vhdl/] [reg_bank.vhd] - Rev 123

Rev	Log message	Author	Age	Path
123	Uncomment out the Altera portion. Xilinx users may need to re-comment out this section.	rhoads	7432d 05h	/plasma/trunk/vhdl/reg_bank.vhd
115	Matthias Grunewald's changes for Xilinx FPGA dual-port RAM.	rhoads	7546d 05h	/plasma/trunk/vhdl/reg_bank.vhd
108	changed interrupt vector from 0x30 to 0x3c	rhoads	7820d 02h	/plasma/trunk/vhdl/reg_bank.vhd
88	Cleanup spaces	rhoads	8071d 02h	/plasma/trunk/vhdl/reg_bank.vhd
74	pause in	rhoads	8079d 04h	/plasma/trunk/vhdl/reg_bank.vhd
55	Altera	rhoads	8087d 09h	/plasma/trunk/vhdl/reg_bank.vhd
48	Altera	rhoads	8098d 04h	/plasma/trunk/vhdl/reg_bank.vhd
47	Altera	rhoads	8105d 05h	/plasma/trunk/vhdl/reg_bank.vhd
43	Renamed M-lite to Plasma	rhoads	8185d 05h	/plasma/trunk/vhdl/reg_bank.vhd
39	Changed name to M-lite to avoid trademark issues.	rhoads	8217d 10h	/plasma/trunk/vhdl/reg_bank.vhd
24	Disable interrupts upon reset.	rhoads	8242d 04h	/plasma/trunk/vhdl/reg_bank.vhd
12	Better support for dual-port memories, removed old method	rhoads	8248d 04h	/plasma/trunk/vhdl/reg_bank.vhd
9	Support for generic_tpram dual-port RAM	rhoads	8253d 07h	/plasma/trunk/vhdl/reg_bank.vhd
8	Preparing to use dual-port memory for registers.	rhoads	8254d 05h	/plasma/trunk/vhdl/reg_bank.vhd
6	JAL now correctly sets r31 to instruction AFTER branch delay slot. Fixed interrupts.	rhoads	8263d 10h	/plasma/trunk/vhdl/reg_bank.vhd
2	MIPS-lite CPU core	rhoads	8482d 10h	/plasma/trunk/vhdl/reg_bank.vhd