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[/] [plasma/] [trunk/] [vhdl/] [tbench.vhd] - Rev 403

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Rev Log message Author Age Path
403 Disable Ethernet and cache when simulating. rhoads 4762d 17h /plasma/trunk/vhdl/tbench.vhd
352 linus 5561d 07h /plasma/trunk/vhdl/tbench.vhd
350 root 5590d 03h /plasma/trunk/vhdl/tbench.vhd
346 Support optional 4KB cache rhoads 5657d 22h /plasma/trunk/vhdl/tbench.vhd
265 Changed write_byte_enable to byte_we rhoads 6041d 01h /plasma/trunk/vhdl/tbench.vhd
139 Major changes -- updated to Plasma Version 3 rhoads 6690d 15h /plasma/trunk/vhdl/tbench.vhd
132 Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly. rhoads 7170d 14h /plasma/trunk/vhdl/tbench.vhd
128 Reset all registers, constants now upper case. rhoads 7308d 01h /plasma/trunk/vhdl/tbench.vhd
106 better test mem_pause rhoads 7784d 14h /plasma/trunk/vhdl/tbench.vhd
102 permit testing mem_pause rhoads 7785d 13h /plasma/trunk/vhdl/tbench.vhd
55 Altera rhoads 8048d 19h /plasma/trunk/vhdl/tbench.vhd
51 GENERIC rhoads 8059d 14h /plasma/trunk/vhdl/tbench.vhd
48 Altera rhoads 8059d 14h /plasma/trunk/vhdl/tbench.vhd
47 Altera rhoads 8066d 15h /plasma/trunk/vhdl/tbench.vhd
43 Renamed M-lite to Plasma rhoads 8146d 15h /plasma/trunk/vhdl/tbench.vhd
39 Changed name to M-lite to avoid trademark issues. rhoads 8178d 20h /plasma/trunk/vhdl/tbench.vhd
8 Preparing to use dual-port memory for registers. rhoads 8215d 14h /plasma/trunk/vhdl/tbench.vhd
7 Made writes 4 cycles, improved mem_ctrl.vhd rhoads 8220d 21h /plasma/trunk/vhdl/tbench.vhd
6 JAL now correctly sets r31 to instruction AFTER branch delay slot. Fixed interrupts. rhoads 8224d 19h /plasma/trunk/vhdl/tbench.vhd
2 MIPS-lite CPU core rhoads 8443d 20h /plasma/trunk/vhdl/tbench.vhd

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