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[/] [potato/] [branches] - Rev 59

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59 Remove branch: "new-privileged-isa" skordal 3504d 23h /potato/branches
57 Add processor datasheet skordal 3505d 02h /potato/branches
56 Remove old and outdated processor manual skordal 3505d 03h /potato/branches
55 Use timer_clk for the example design and SoC testbench skordal 3505d 04h /potato/branches
54 Update benchmarks to work with supervisor spec v1.7 skordal 3509d 18h /potato/branches
53 Upgrade processor core to conform to the supervisor spec v1.7 skordal 3511d 19h /potato/branches
52 Correct .data section of sw-jal test skordal 3511d 19h /potato/branches
51 Add scall/ecall, sbreak/ebreak and timer interrupt tests skordal 3511d 19h /potato/branches
50 Update test environment to the new supervisor ISA skordal 3523d 20h /potato/branches
49 Correct spelling of "privileged" skordal 3533d 19h /potato/branches
48 Create branch for upgrading to the new privileged ISA skordal 3533d 19h /potato/branches
46 Remove branch: cache-playground skordal 3536d 21h /potato/branches
44 Add instruction cache and use the WB adapter as dmem interface skordal 3536d 21h /potato/branches
43 Improve instruction fetch logic skordal 3536d 21h /potato/branches
42 Move check for stall from irq_asserted to exception_taken in EX stage skordal 3536d 21h /potato/branches
41 Make continouous status register reads asynchronous skordal 3536d 21h /potato/branches
40 Reduce example design clock frequency to 50 MHz

- Also includes a minor change to make the address decoder/interconnect work
better with burst transfers.		 skordal 3536d 21h /potato/branches
39 Disable IRQs when handling exceptions skordal 3536d 21h /potato/branches
38 Add "Hello World" test application skordal 3536d 22h /potato/branches
37 Add macro to set the TOHOST register from C code skordal 3536d 22h /potato/branches

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