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[/] [potato/] [branches] - Rev 49

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Rev Log message Author Age Path
49 Correct spelling of "privileged" skordal 3418d 23h /potato/branches
48 Create branch for upgrading to the new privileged ISA skordal 3418d 23h /potato/branches
46 Remove branch: cache-playground skordal 3422d 01h /potato/branches
44 Add instruction cache and use the WB adapter as dmem interface skordal 3422d 01h /potato/branches
43 Improve instruction fetch logic skordal 3422d 01h /potato/branches
42 Move check for stall from irq_asserted to exception_taken in EX stage skordal 3422d 01h /potato/branches
41 Make continouous status register reads asynchronous skordal 3422d 01h /potato/branches
40 Reduce example design clock frequency to 50 MHz

- Also includes a minor change to make the address decoder/interconnect work
better with burst transfers.		 skordal 3422d 01h /potato/branches
39 Disable IRQs when handling exceptions skordal 3422d 01h /potato/branches
38 Add "Hello World" test application skordal 3422d 03h /potato/branches
37 Add macro to set the TOHOST register from C code skordal 3422d 03h /potato/branches
33 Ensure correct read of CSR after stall skordal 3422d 03h /potato/branches
32 Prevent jumping/branching when stalling skordal 3425d 00h /potato/branches
31 Prevent flushing the pipeline if it is stalling skordal 3425d 01h /potato/branches
30 Add testcase for a combination of instructions that fail when using cache skordal 3427d 06h /potato/branches
29 Add reset functionality for the WB arbiter state machine skordal 3430d 01h /potato/branches
27 Prevent exceptions from being taken while stalling skordal 3436d 02h /potato/branches
25 Add placeholder cache modules and a wishbone arbiter skordal 3438d 10h /potato/branches
23 Create branch to use for implementing a cache skordal 3438d 23h /potato/branches
1 The project and the structure was created root 3477d 14h /potato/branches

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