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[/] [raptor64/] [trunk/] [rtl/] [verilog/] - Rev 52

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Rev Log message Author Age Path
52 - most recent updates to
- compiler (thread keyword) , shift bug fix
- CPU segmentation model update
- SimpleMMU added		 robfinch 4228d 05h /raptor64/trunk/rtl/verilog
50 - interrupt work robfinch 4242d 10h /raptor64/trunk/rtl/verilog
48 - fixed pipeline bug
- added segment registers
- updated bootrom		 robfinch 4246d 21h /raptor64/trunk/rtl/verilog
45 - separate exception status per context
- debugging PC
-		 robfinch 4255d 12h /raptor64/trunk/rtl/verilog
44 - fix: assert byte select lines during burst access
- fixup bitfield instructions		 robfinch 4262d 00h /raptor64/trunk/rtl/verilog
42 - updated assembler, sample files, 32 bit ISA robfinch 4266d 06h /raptor64/trunk/rtl/verilog
41 - change to 32 bit ISA robfinch 4266d 06h /raptor64/trunk/rtl/verilog
33 - updated cpu files robfinch 4285d 02h /raptor64/trunk/rtl/verilog
31 - added more smaller modules robfinch 4485d 16h /raptor64/trunk/rtl/verilog
30 - separated out Branch History, regfile, and TLB robfinch 4487d 04h /raptor64/trunk/rtl/verilog
29 - exception processing update robfinch 4490d 00h /raptor64/trunk/rtl/verilog
25 - updated processor robfinch 4499d 23h /raptor64/trunk/rtl/verilog
21 - fixes, loop, instruction buffer robfinch 4512d 20h /raptor64/trunk/rtl/verilog
20 - more source changes robfinch 4517d 01h /raptor64/trunk/rtl/verilog
19 - added instruction buffer for non-icache operation robfinch 4517d 01h /raptor64/trunk/rtl/verilog
16 - working on interrupt hardware robfinch 4518d 00h /raptor64/trunk/rtl/verilog
15 - disassembles opcodes for diagnostic dump robfinch 4518d 17h /raptor64/trunk/rtl/verilog
14 - many changes
- removed cmd bus from sc version
-		 robfinch 4518d 17h /raptor64/trunk/rtl/verilog
13 - single context (sc) version of cpu robfinch 4520d 22h /raptor64/trunk/rtl/verilog
12 - updated for updated instruction set
- added WB ROM		 robfinch 4520d 22h /raptor64/trunk/rtl/verilog

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